Abstract
With the progress of submicron MOS technologies, recent efforts in the design of wireless transceivers have focused on achieving higher levels of integration compared with conventional approaches. As a result, CMOS may prove to be a feasible technology to attain the goal of full-scale integration. This chapter will investigate the design and implementation of wireless power amplifiers in CMOS technology, which we mainly investigate the class-AB “linear” power amplifier and the class-E “nonlinear” power amplifier for the applications of different modulation schemes. The practical considerations for the implementation will be presented in the case study concerned with the implementation of an experimental prototype test chip fabricated in a 0.18-µm CMOS process.
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